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Low-Resolution ADC

1-to-3 Bit Quantization for Extreme Bandwidths

High-speed analog-to-digital converters utilizing coarse 1-to-3 bit quantization to digitize multi-gigahertz Sub-THz channels with minimal power dissipation.

Technical Explanation

Analog-to-Digital Converters (ADCs) with high resolution (e.g., 10-12 bits) consume power that scales exponentially with sampling rate. Digitizing a 10 GHz wide Sub-THz channel at Nyquist rates (20 GS/s) using a 12-bit ADC would consume tens of watts per antenna, making massive arrays impossible. Low-Resolution ADCs employ coarse 1-bit or 2-bit quantization, slashing power consumption by 90% while using non-linear signal processing to reconstruct user data perfectly.

Key Functions

  • Slashing analog-to-digital conversion power consumption by over 90% in massive arrays
  • Enabling 20+ Giga-samples/sec sampling rates across multi-gigahertz Sub-THz channels
  • Non-linear reconstruction algorithms restoring high-fidelity user data from coarse 1-3 bit inputs
  • Significant reduction in baseband digital signal processing silicon area and thermal heat
  • Essential hardware enabler for commercial handheld Sub-THz smartphones and mobile devices
Specifications
IEEE Transactions on Signal Processing, 6G Hardware Research Consortium
Interfaces
LowRes-ADC-DieQuantized-I/Q

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