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Sub-Sampling Ultra-Low Power ADC

Ultra-High Speed Low-Power Analog-to-Digital Converter for Handsets

Advanced handset converter architecture achieving tens of gigasamples per second (GS/s) with minimal power drain for wideband 6G signals.

Technical Explanation

Wideband 6G carriers spanning multiple gigahertz of spectrum present immense power challenges for conventional full-Nyquist ADCs in smartphones. The sub-sampling ultra-low power ADC utilizes time-interleaved successive approximation register (SAR) architectures with non-uniform compressed sensing techniques. By sampling at dynamic sub-Nyquist rates based on instantaneous channel sparsity, it digitizes multi-GHz bandwidths while operating below 50 milliwatts, preserving handset battery life.

Key Functions

  • Digitizes multi-GHz bandwidths at tens of GSamples/sec with low power draw
  • Utilizes dynamic compressed sensing to reduce power consumption during idle slots
  • Implements digital background calibration to correct inter-core mismatch errors
  • Integrates directly into deep-submicron handset transceiver SoCs
Specifications
IEEE Solid-State Circuits Society, 3GPP Rel-19 Hardware Feasibility
Interfaces
RF Front-End Analog OutDigital Baseband Input

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