6G • Spectrum
Handset Low-Phase-Noise PLL
Sub-THz Fractional-N Phase-Locked Loop for Mobile Devices
High-frequency clock generation circuit minimizing phase noise and jitter when synthesizing 140+ GHz local oscillator frequencies in handsets.
Technical Explanation
At sub-THz frequencies, phase noise in local oscillators (LO) severely degrades signal-to-noise ratios and limits high-order QAM modulation. The handset low-phase-noise PLL combines sub-sampling phase detectors with injection-locked frequency multipliers (ILFM) fabricated in silicon. It delivers ultra-low integrated jitter (<80 femtoseconds) across battery supply voltage fluctuations, enabling 6G smartphones to demodulate 64-QAM and 256-QAM signals at 140 GHz without signal corruption.
Key Functions
- Synthesizes clean local oscillator carrier signals in the 100-300 GHz regime
- Suppresses phase noise and timing jitter below 80 femtoseconds
- Compensates for thermal drift and battery discharge during continuous operation
- Enables high-order modulation (64-QAM/256-QAM) on sub-THz carrier channels
Specifications
IEEE Journal of Solid-State Circuits, 3GPP Rel-19 Sub-THz Radio Performance
Interfaces
Local Oscillator (LO) Distribution BusRF Mixer Core
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